• DocumentCode
    3493043
  • Title

    Independent-Gate Controlled Asymmetrical SRAM Cells in Double-Gate MOSFET Technology for Improved READ Stability

  • Author

    Kim, Jae-Joon ; Kim, Keunwoo ; Chuang, Ching-Te

  • Author_Institution
    IBM T. J. Watson Res. Center, Yorktown Heights, NY
  • fYear
    2006
  • fDate
    19-21 Sept. 2006
  • Firstpage
    73
  • Lastpage
    76
  • Abstract
    This paper presents novel asymmetrical SRAM cell topologies in double-gate technology. These cells utilize the independent-gate control to overcome the limitation of conventional device sizing for stability improvement in asymmetrical SRAM cells. We show that optimal READ stability, where the READ stability approaches the HOLD stability, can be achieved with the proposed scheme. Mixed-mode device/circuit simulations show that the proposed cell has 1.9X stability improvement over conventional SRAM and 1.5X stability improvement over asymmetrical SRAM with device sizing only
  • Keywords
    MOSFET; SRAM chips; mixed analogue-digital integrated circuits; HOLD stability; READ stability; asymmetrical SRAM cell topologies; circuit simulations; double-gate MOSFET technology; double-gate technology; independent-gate control; mixed-mode device; Circuit simulation; Circuit stability; Circuit topology; Logic; MOSFET circuits; Optimal control; Pulse inverters; Random access memory; Stability analysis; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Device Research Conference, 2006. ESSDERC 2006. Proceeding of the 36th European
  • Conference_Location
    Montreux
  • ISSN
    1930-8876
  • Print_ISBN
    1-4244-0301-4
  • Type

    conf

  • DOI
    10.1109/ESSDER.2006.307641
  • Filename
    4099859