Design of single chip integration of MWNTs/SiO2 humidity sensor and its interface ASIC

A design on single chip integration of MWNTs/SiO₂ thin film humidity sensor and interface circuit based on standard IC process is presented. Humidity sensing unit on chip surface is achieved following 0.5 μm CMOS layout design rules, which ensures compatibility and reliability of the whole system. Interface circuit with phase sensitive demodulation can detect nF level capacitance and derive a proportional direct output voltage. AC signal frequency on testing system can influence interface performance and measurable peak capacitance will descend from 40 nF to less than 25 nF as frequency ascend from 5kHz to 50kHz. Hspice simulation proves ASIC interface has good linearity and low offset, and can work normally for practical MWNTs humidity sensor detection.