16-bit Delta-Sigma DAC with cascade-of-resonators feed-forward modulator and interpolation filter with OCSD code

Author

Wang, Yongsheng ; Cai, Mengye ; Zhang, Yonglai ; Yu, Mingyan

Author_Institution

Micro-Electron. Dept., Harbin Inst. of Technol., Harbin, China

fYear

2012

fDate

23-25 Aug. 2012

Firstpage

478

Lastpage

481

Abstract

A 16-bit 5.6-MHz clock-rate digital to analog converter (DAC) achieves 96-dB signal-to-noise rate (SNR) in the 22-KHz band. The optimal canonic signed digit (OCSD) code is proposed in a multi-stage interpolator filter to achieve less hardware consumption. A third-order cascade-of-resonators feed-forward (CRFF) with zero optimization Delta-Sigma modulator has been developed to convert an oversampled digital signal into 1-bit code. A switch-capacitor (SC) analog filter is used to reconstruct the analog signal.

Keywords

circuit optimisation; delta-sigma modulation; feedback; resonators; signal reconstruction; switched capacitor filters; CRFF; DAC; OCSD code; SC analog filter; SNR; analog signal reconstruction; clock-rate digital-to-analog converter; delta-sigma DAC; frequency 22 kHz; frequency 5.6 MHz; multistage interpolator filter; optimal canonic signed digit code; signal-to-noise rate; switch-capacitor analog filter; third-order cascade-of-resonator feedforward modulator; word length 16 bit; zero optimization delta-sigma modulator; Finite impulse response filter; Hardware; Interpolation; Low pass filters; Modulation; Switches; Delta-Sigma mudulator; interpolation filter; reconstruction analog filter;

fLanguage

English

Publisher

ieee

Conference_Titel

Optoelectronics and Microelectronics (ICOM), 2012 International Conference on

Conference_Location

Changchun, Jilin

Print_ISBN

978-1-4673-2638-4

Type

conf

DOI

10.1109/ICoOM.2012.6316319

Filename

6316319