Using PEEC and FDTD to solve the challenge delay line problem

A number of special challenging EMC modeling problems have been proposed by the IEEE/EMC Society TC-9 Committee. The set of specific problems have been created to highlight the strengths and weaknesses of the various computational modeling techniques and provide the user with various modeling problems with which to possibly challenge potential vendors. One of the key ways to validate a given modeling result is to apply two or more completely different techniques to the problem and obtain the same answer. This paper analyzes one of the new challenging problems introduced this year. The delay line analysis is complex and requires careful analysis and many important factors must be included. This paper compares results using the finite-difference time-domain technique and the partial element equivalent circuit method. Each technique solves the same problem in very different fashion. This paper shows the results of all different techniques compared directly together