DocumentCode
3493545
Title
Effects of the Band-Structure Modification in Silicon Nanowires with Small Diameters
Author
Gnani, E. ; Reggiani, S. ; Rudan, M. ; Baccarani, G.
Author_Institution
ARCES & DEIS, Bologna Univ.
fYear
2006
fDate
19-21 Sept. 2006
Firstpage
170
Lastpage
173
Abstract
In this work, the authors investigate the accuracy of the parabolic-band model for the simulation of cylindrical nanowire (CNW) FETs scaled down to a 1-nm diameter. Doing so, rely on a recently-published results based on a tight-binding computation of the band structure in square-and circular-section nanowires. The above results indicate that the FET characteristics are affected in two ways by the parabolic-band approximation: first, the conduction-band edge is shifted upwards in both nanowire types, leading to an overestimation of the FET threshold voltage at small wire areas; next, the transport effective masses are increased by the structural confinement of the electron charge, which is neglected in the parabolic-band model. Fitting functions of the tight-binding conduction-band edge and transport effective masses are worked out, thus providing the appropriate parameters for transport simulations. The output characteristics of the CNW-FET are then computed using the quantum-transmitting boundary method (QTBM) with and without the corrected conduction-band edge and transport effective masses, and the influence of the above corrections on threshold voltage and on-current is finally assessed
Keywords
band structure; field effect transistors; nanowires; semiconductor device models; tight-binding calculations; transport processes; 1 nm; band-structure modification; circular section nanowires; conduction-band edge; cylindrical nanowire FET; parabolic-band model; quantum-transmitting boundary; silicon nanowires; square section nanowires; threshold voltage correction; tight-binding computation; transport effective masses; transport simulations; CMOS technology; Computational modeling; Effective mass; Electrostatics; FETs; Nanowires; Quantum computing; Silicon; Threshold voltage; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Device Research Conference, 2006. ESSDERC 2006. Proceeding of the 36th European
Conference_Location
Montreux
ISSN
1930-8876
Print_ISBN
1-4244-0301-4
Type
conf
DOI
10.1109/ESSDER.2006.307665
Filename
4099883
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