Highly parallel implementation of Sphinx-3 voice recognition algorithm

General-purpose computing on graphics processing units (GPGPU) has been an active area of scientific research in recent years. Most of the research efforts are based upon the Compute Unified Device Architecture (i.e. CUDA), introduced by Nvidia and targeting its products. In this work, the features of the abovementioned technology are exploited to produce a highly parallel implementation of the Sphinx 3 voice recognition algorithm. Our goal was to improve the execution time of the decoder, in specific. Execution times achieved indicate that it is indeed possible to speed up the algorithm even if the vast majority of the code cannot be run in parallel.