DocumentCode
3493967
Title
Scaling aspects of microjoints for 3D chip interconnects
Author
Munding, A. ; Kaiser, A. ; Benkart, P. ; Kohn, E. ; Heittmann, A. ; Hübner, H. ; Ramacher, U.
Author_Institution
Dept. of Electron Devices & Circuits, Ulm Univ.
fYear
2006
fDate
19-21 Sept. 2006
Firstpage
262
Lastpage
265
Abstract
Scaling of microjoints in 3-dimensional chip stacks is proposed by means of kinetic control. Therefore, phase growth in the copper/tin system in presence of various metal barriers at the interface is evaluated. Promising results have been obtained by using layers of Ti, Ta, Ti:W or combilayers thereof in a thickness range of 20 to 50 nm. The lack of wetting ability observed in some cases could be overcome by thermal pretreatment in order to promote phase nucleation before tin melting
Keywords
copper alloys; integrated circuit interconnections; joining processes; melting; nucleation; tantalum alloys; tin alloys; titanium alloys; tungsten alloys; wetting; 20 to 50 nm; 3D chip interconnects; Cu-Sn; Ta; Ti:W; melting; metal barriers; microjoints; phase nucleation; scaling aspects; Bonding; Electron devices; Geometry; Integrated circuit interconnections; Intermetallic; Kinetic theory; Soldering; Solids; Temperature; Tin;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Device Research Conference, 2006. ESSDERC 2006. Proceeding of the 36th European
Conference_Location
Montreux
ISSN
1930-8876
Print_ISBN
1-4244-0301-4
Type
conf
DOI
10.1109/ESSDER.2006.307688
Filename
4099906
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