Investigations on an Isolated Lateral High-Voltage n-channel LDMOS Transistor with a Typical Breakdown of 150V

This work describes a concept of an isolated high-voltage (HV) n-channel LDMOS transistor, which can be used as a high-side switch instead of a HV PMOS transistor. HV n-channel LDMOSFETs for 120V applications (blocking voltage over 150V) were used in the study. The devices were fabricated in a 0.35 mum CMOS-based HV technology. Hot carrier stress experiments (under gate voltage VGS = 10V and drain voltage VD = 120V) were performed for device reliability evaluations. The devices with non-uniformly optimized n-well show an excellent trade-off between blocking voltage (BV) and on-resistance while keeping hot carrier induced degradation low