• DocumentCode
    3494218
  • Title

    Partitioning Scheme in Lateral Asymmetric MOST

  • Author

    Roy, A.S. ; Chauhan, Y.S. ; Sallese, J.M. ; Enz, C.C. ; Ionescu, A.M. ; Declercq, M.

  • Author_Institution
    Ecole Polytechnique Federale de Lausanne (EPFL)
  • fYear
    2006
  • fDate
    Sept. 2006
  • Firstpage
    307
  • Lastpage
    310
  • Abstract
    Lateral asymmetric MOSFET, which has longitudinal doping variation in the channel, is the core of high voltage MOSFET. Recently it has been recognized that capacitance property of this kind of device is fundamentally different from conventional MOST because Ward-Dutton (WD) charge partitioning is not applicable to this kind of devices (Aarts, 2006). In this work we show the existence of a partitioning scheme for small-signal operation of the device. We also provide physical explanations of unusual behavior of Cdg in lateral asymmetric MOST. The proposed theory is validated by extensive numerical and device simulation
  • Keywords
    MOSFET; MOSFET partitioning scheme; high voltage MOSFET; lateral asymmetric MOSFET; lateral asymmetric MOST; longitudinal doping variation; Capacitance; Doping; Equations; MOSFET circuits; Numerical simulation; Power MOSFET; Radio frequency; Switched-mode power supply; Threshold voltage; Tunneling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Device Research Conference, 2006. ESSDERC 2006. Proceeding of the 36th European
  • Conference_Location
    Montreux
  • ISSN
    1930-8876
  • Print_ISBN
    1-4244-0301-4
  • Type

    conf

  • DOI
    10.1109/ESSDER.2006.307699
  • Filename
    4099917
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3494218