DocumentCode :
3494386
Title :
Highly Reliable TiN/ZrO2/TiN 3D Stacked Capacitors for 45 nm Embedded DRAM Technologies
Author :
Berthelot, A. ; Caillat, C. ; Huard, V. ; Barnola, S. ; Boeck, B. ; Del-Puppo, H. ; Emonet, N. ; Lalanne, F.
Author_Institution :
Philips Semicond., Crolles
fYear :
2006
fDate :
19-21 Sept. 2006
Firstpage :
343
Lastpage :
346
Abstract :
For the first time, we report a complete evaluation of a TiN/ZrO 2/TiN stacked capacitor suitable for 45 nm embedded DRAM (eDRAM). Indeed, this study, done on a real integration (65 nm 3D stacked capacitor flow), shows that zirconium oxide, deposited at low temperature (275degC) by atomic layer deposition (ALD), meets all the 45 nm eDRAM specifications: an equivalent oxide thickness (EOT) below 8 Aring with leakage current density within criterion (<1 fA/cell at 125degC), a good uniformity, low defectivity, and a lifetime > 10 years (at Vdd = 1V)
Keywords :
DRAM chips; atomic layer deposition; capacitors; current density; embedded systems; leakage currents; titanium compounds; zirconium compounds; 1 V; 125 C; 275 C; 3D stacked capacitors; 45 nm; 65 nm; ALD; TiN-ZrO2-TiN; TiN/ZrO2/TiN stacked capacitors; atomic layer deposition; eDRAM technologies; embedded DRAM technologies; equivalent oxide thickness; leakage current density; zirconium oxide; Atomic layer deposition; Capacitance; Electrodes; High K dielectric materials; High-K gate dielectrics; MIM capacitors; Manufacturing; Random access memory; Temperature; Tin;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research Conference, 2006. ESSDERC 2006. Proceeding of the 36th European
Conference_Location :
Montreux
ISSN :
1930-8876
Print_ISBN :
1-4244-0301-4
Type :
conf
DOI :
10.1109/ESSDER.2006.307708
Filename :
4099926
Link To Document :
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