Superior N- and PMOSFET scalability using carbon co-implantation and spike annealing

Author

Augendre, E. ; Pawlak, B.J. ; Kubicek, S. ; Hoffmann, T. ; Chiarella, T. ; Kerner, C. ; Severi, S. ; Falepin, A. ; Ramos, J. ; De Keersgieter, An ; Eyben, P. ; Vanhaeren, D. ; Vandervorst, W. ; Jurczak, M. ; Absil, P. ; Biesemans, S.

Author_Institution

IMEC, Leuven

fYear

2006

fDate

19-21 Sept. 2006

Firstpage

355

Lastpage

358

Abstract

We report the simultaneous improvement of both on- and off-properties for n- and p-channel MOSFETs by means of carbon co-implantation at extension level, using conventional spike annealing. For the first time, spike-annealed NFETs with phosphorus-implanted source/drain extensions (SDE) are shown to outperform conventional As-implanted devices in the deca-nanometric range. Parameters such as on-current, drain-induced barrier lowering (DIBL), external resistance (R_EXT) vs. effective channel length (L_eff) trade-off are examined. To obtain the full benefit of carbon co-implantation, we recommend adjusting pocket, highly doped drain (HDD) and spacer parameters

Keywords

MOSFET; annealing; carbon; ion implantation; phosphorus; semiconductor doping; As-implanted devices; C; P; carbon co-implantation; highly doped drain; n-channel MOSFET; nMOSFET scalability; p-channel MOSFET; pMOSFET scalability; source/drain extensions; spacer parameters; spike annealing; spike-annealed NFET; Annealing; Atomic beams; Boron; Conductivity; Doping; Fabrication; Implants; MOSFET circuits; Scalability; Solids;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research Conference, 2006. ESSDERC 2006. Proceeding of the 36th European

Conference_Location

Montreux

ISSN

1930-8876

Print_ISBN

1-4244-0301-4

Type

conf

DOI

10.1109/ESSDER.2006.307711

Filename

4099929