Electrical characterization of 180 nm CMOS devices by spreading resistance profiling

Developing doping technologies for the channel region of CMOS devices for 180 nm technology and beyond requires accurate profiles of electrically active dopants. We have recently improved the accuracy of spreading resistance profiles on sub-80 nm source/drain boron implants. Previous SRP analyses ignored the fact that, in ultra-shallow source/drain structures, the sheet resistance dominates measured spreading resistance values. Because these SRP measurements are made at the edge of a doped layer, this implies that an additional sheet resistance edge correction should be applied to measured spreading resistance data. In this paper, we extend these improved spreading resistance corrections to the analysis of a variety of channel doping technologies. We examine sub-80 nm source/drains made with boron implants and study the implications of the new analysis. We also compare channel doping (V_T) profiles with profiles obtained by a highly repeatable MOS-CV method