Does Multi-Trap Assisted Tunneling explain the oxide thickness dependence of the Statistics of SILC in FLASH Memory Arrays?

In this paper, we analyze the experimental SILC statistical data at low stress reported in (Driussi et al., 2005) . To this purpose we developed an analytical physical model to study the statistical distribution of the TAT current due to single and multiple traps in the gate oxide of a floating gate memory cell. We modeled also the generation dynamics of conductive percolation paths due to more traps and we simulated the SILC statistical distribution in the memory cell. This study points out the differences in the statistical behavior of the TAT current due to defects formed by single and multiple traps