Frame-level heuristic scheduling Multi-view Video Coding on symmetric multi-core architecture

Author

Pang, Yi ; Wen, Jiangtao Gene ; Sun, Lifeng ; Hu, Weidong ; Yang, Shiqiang

Author_Institution

Comput. Sci. Dept., Tsinghua Univ., Beijing, China

fYear

2009

fDate

7-10 Nov. 2009

Firstpage

2305

Lastpage

2308

Abstract

In this paper, we propose a frame-level heuristic scheduling parallel emerging Multi-view Video Coding (MVC) using Directed Acyclic Graph (DAG) on Intel multi-core processor. We illustrate the reason to choose heuristic scheduling and formulate the problem. Through defining dependent degree and concurrent degree, we demonstrate why to choose frame as parallel granularity. Experimental results demonstrate the effectiveness and scalability of our parallel MVC.

Keywords

directed graphs; microprocessor chips; multiprocessing systems; parallel architectures; scheduling; video coding; Intel multicore processor; concurrent degree; dependent degree; directed acyclic graph; frame-level heuristic scheduling; parallel emerging multiview video coding; parallel granularity; symmetric multicore architecture; Computer architecture; Encoding; Laboratories; Multicore processing; Optimal scheduling; Processor scheduling; Scheduling algorithm; Sun; Video coding; Video compression;

fLanguage

English

Publisher

ieee

Conference_Titel

Image Processing (ICIP), 2009 16th IEEE International Conference on

Conference_Location

Cairo

ISSN

1522-4880

Print_ISBN

978-1-4244-5653-6

Electronic_ISBN

1522-4880

Type

conf

DOI

10.1109/ICIP.2009.5414464

Filename

5414464