DocumentCode :
3494946
Title :
Implementation of signal processing tasks on neuromorphic hardware
Author :
Temam, Olivier ; Heliot, Rodolphe
Author_Institution :
INRIA Saclay Ile-de-France, Orsay, France
fYear :
2011
fDate :
July 31 2011-Aug. 5 2011
Firstpage :
1120
Lastpage :
1125
Abstract :
Because of power and reliability issues, computer architects are forced to explore new types of architectures, such as heterogeneous systems embedding hardware accelerators. Neuromorphic systems are good candidate accelerators that can perform efficient and robust computing for certain classes of applications. We propose a piking neurons based accelerator, with its hardware and software, that can be easily programmed to execute a wide range of signal processing applications. A library of operators is built to facilitate implementation of various types of applications. Automated placement and routing software tools are used to map these applications onto the hardware. Altogether, this system aims at providing to the user a simple way to implement signal processing tasks on neuromorphic hardware.
Keywords :
digital signal processing chips; integrated circuit reliability; network routing; neural net architecture; power aware computing; signal processing; automated placement and routing software tool; computer architecture; hardware accelerator; heterogeneous system; neuromorphic hardware; reliability; signal processing; spiking neuron based accelerator; Bismuth; Joints; Neural networks; USA Councils;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Neural Networks (IJCNN), The 2011 International Joint Conference on
Conference_Location :
San Jose, CA
ISSN :
2161-4393
Print_ISBN :
978-1-4244-9635-8
Type :
conf
DOI :
10.1109/IJCNN.2011.6033349
Filename :
6033349
Link To Document :
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