DocumentCode :
3496700
Title :
Multi-application mapping algorithm for Network-on-Chip platforms
Author :
Yang, Bo ; Guang, Liang ; Xu, Thomas Canhao ; Säntti, Tero ; Plosila, Juha
Author_Institution :
Dept. of Inf. Technol., Univ. of Turku, Turku, Finland
fYear :
2010
fDate :
17-20 Nov. 2010
Abstract :
Multi- and many-core architectures have become the mainstream computing platforms for implementing Systems-on-Chip (SoC). To efficiently utilize the abundant processing resources on future many-core Network-on-Chip (NoC) platforms, the design focus should shift from single-application to multi-application scenarios. In this paper, we propose a multiple application mapping algorithm which maps multiple applications simultaneously onto different regions on the NoC. By optimizing the placement of both applications and tasks, the algorithm aims at shortening the average communication distance which in turn achieves lower network latency and energy consumption for a set of applications. The experimental results show that, compared to the random mapping, the proposed algorithm achieves 59% and 58% reductions of average network delay and energy consumption respectively.
Keywords :
energy consumption; network-on-chip; optimisation; energy consumption; multi-application mapping algorithm; network latency; network-on-chip platforms; optimisation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical and Electronics Engineers in Israel (IEEEI), 2010 IEEE 26th Convention of
Conference_Location :
Eliat
Print_ISBN :
978-1-4244-8681-6
Type :
conf
DOI :
10.1109/EEEI.2010.5662160
Filename :
5662160
Link To Document :
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