Title :
Fault tolerant algorithms for network-on-chip interconnect
Author :
Pirretti, M. ; Link, G.M. ; Brooks, R.R. ; Vijaykrishnan, N. ; Kandemir, M. ; Irwin, M.J.
Author_Institution :
Pennsylvania State Univ., University Park, PA, USA
Abstract :
As technology scales, fault tolerance is becoming a key concern in on-chip communication. Consequently, this work examines fault tolerant communication algorithms for use in the NoC domain. Two different flooding algorithms and a random walk algorithm are investigated. We show that the flood-based fault tolerant algorithms have an exceedingly high communication overhead. We find that the redundant random walk algorithm offers significantly reduced overhead while maintaining useful levels of fault tolerance. We then compare the implementation costs of these algorithms, both in terms of area as well as in energy consumption, and show that the flooding algorithms consume an order of magnitude more energy per message transmitted.
Keywords :
algorithm theory; fault tolerant computing; integrated circuit interconnections; system-on-chip; communication overhead; energy consumption; fault tolerant algorithm; fault tolerant communication algorithms; flood-based fault tolerant algorithms; flooding algorithms; implementation costs; network-on-chip interconnect; on-chip communication; redundant random walk algorithm; Algorithm design and analysis; Circuit faults; Costs; Energy consumption; Fault tolerance; Floods; Integrated circuit interconnections; Manufacturing; Network-on-a-chip; Stochastic processes;
Conference_Titel :
VLSI, 2004. Proceedings. IEEE Computer society Annual Symposium on
Print_ISBN :
0-7695-2097-9
DOI :
10.1109/ISVLSI.2004.1339507