DocumentCode
3498076
Title
Latch induced hot-carrier effects in fully-depleted and partially-depleted SIO/NMOSFET´s
Author
Zhang, Binglong ; Ma, T.P.
Author_Institution
Dept. of Electr. Eng., Yale Univ., New Haven, CT, USA
fYear
1993
fDate
1993
Firstpage
237
Lastpage
241
Abstract
Single-transistor-latch induced hot-carrier stress is found to cause charge trapping and interface-trap generation in both the gate oxide and the buried oxide in SOI/NMOSFET´s made on a range of top silicon thicknesses. The resulting degradation of the front-channel transistor characteristics depends strongly on the top silicon thickness. Self-consistent models are proposed to explain the results.
Keywords
SIMOX; hot carriers; insulated gate field effect transistors; interface electron states; semiconductor device models; SIMOX wafer; Si-SiO2; charge trapping; fully depleted SOI NMOSFET; interface-trap generation; latch induced hot carrier stress; partially depleted SOI NMOSFET; self-consistent models; Degradation; Electron traps; Hot carrier effects; MOSFET circuits; Microelectronics; Semiconductor thin films; Silicon; Stress measurement; Thin film transistors; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems, and Applications, 1993. Proceedings of Technical Papers. 1993 International Symposium on
Conference_Location
Taipei, Taiwan
ISSN
1524-766X
Print_ISBN
0-7803-0978-2
Type
conf
DOI
10.1109/VTSA.1993.263598
Filename
263598
Link To Document