Title : 
A reconfigurable platform for the design and verification of domain-specific accelerators
         
        
            Author : 
Park, Sungho ; Cho, Yong Cheol Peter ; Irick, Kevin M. ; Narayanan, Vijaykrishnan
         
        
            Author_Institution : 
Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA
         
        
        
            fDate : 
Jan. 30 2012-Feb. 2 2012
         
        
        
        
            Abstract : 
In this paper we present Vortex: a reconfigurable Network-on-Chip platform suitable for implementing domain-specific hardware accelerators in a design efficient manner. Our Vortex platform provides a flexible means to compose domain-specific accelerators for streaming applications such as performance critical machine vision systems. By substituting a traditional shared-bus architecture with low latency packet-switched routers and high utility network adaptors, maximum performance is exploited with minimal regard to communication infrastructure design and validation. To highlight the utility of the Vortex platform we present a case study in which a video analytics pipeline is mapped onto a multi-FPGA system. The system meets real-time throughput requirements on 3 Megapixel 48-bit image sequences with minimal resource overhead attributed to the Vortex communication infrastructure.
         
        
            Keywords : 
field buses; field programmable gate arrays; image sequences; network routing; network-on-chip; reconfigurable architectures; video signal processing; Vortex communication infrastructure; Vortex platform; communication infrastructure design; communication infrastructure validation; domain-specific hardware accelerator; high utility network adaptor; image sequence; low latency packet-switched router; multiFPGA system; performance critical machine vision system; real-time throughput requirement; reconfigurable network-on-chip platform; resource overhead; shared-bus architecture; streaming application; video analytics pipeline; Feature extraction; Field programmable gate arrays; Network interfaces; Retina; Streaming media; Switches; Synchronization;
         
        
        
        
            Conference_Titel : 
Design Automation Conference (ASP-DAC), 2012 17th Asia and South Pacific
         
        
            Conference_Location : 
Sydney, NSW
         
        
        
            Print_ISBN : 
978-1-4673-0770-3
         
        
        
            DOI : 
10.1109/ASPDAC.2012.6164928