Abstract :
Notice of Violation of IEEE Publication Principles
"86dBΩ 10Gb/s SiGe Transimpedance Amplifier Using Photodiode Capacitance Neutralization and Vertical Threshold Adjustment"
by Maxim, A.
in the Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting, 2006
Oct. 2006 Page(s):1 - 4
After careful and considered review, it has been determined that the above paper is in violation of IEEE\´s Publication Principles.
Specifically, the paper contains information that Adrian Maxim admits had been falsified. In response to an inquiry on this misconduct, Mr. Maxim acknowledged that the following people who have been listed as co-authors on several of his papers are fabricated names and that he is the only author:
C. Turinici, D. Smith, S. Dupue, M. Gheorge, R. Johns, D. Antrik
Additionally, in papers by Mr. Maxim that have co-authors other than those listed above, it was discovered in some cases that he had not consulted with them while writing the papers, and submitted papers without their knowledge.
Although Mr. Maxim maintains that not all of the data is falsified, IEEE nevertheless cannot assure the integrity of papers posted by him because of his repeated false statements.
Due to the nature of this violation, reasonable effort should be made to remove all past references to the above paper, and to refrain from any future references.
A high gain 10Gb/s transimpedance amplifier capable of directly driving a SERDES IC was realized in a 60GHz fT 0.2μm SiGe HBT process. The shunt-feedback common-emitter input stage uses a bootstrap technique to neutralize the photodiode parasitic capacitance. Cascode configurations and cross-coupled Miller capacitance cancellation were used to minimize the input capacitance of the signal path stages. This reduces the number of inter-stage isolation emitter followers, allowing a low voltage operation. A signal amplitude dependent adjustable th- eshold was implemented in the back-end limiting stages by using inverse hyperbolic tangent circuits. The main TIA specifications include: 86dBΩgain, 12μA input sensitivity, <8pA/√Hz input noise, 0.3W power dissipation from a 3.3V supply and 1.8 times 1.8mm2 die area.
Keywords :
Ge-Si alloys; amplifiers; bootstrap circuits; heterojunction bipolar transistors; 0.3 W; 3.3 V; 60 GHz; SONET; SiGe; photodiode capacitance neutralization; transimpedance amplifier; vertical threshold adjustment; BiCMOS integrated circuits; Germanium silicon alloys; Heterojunction bipolar transistors; Low voltage; Notice of Violation; Paper technology; Parasitic capacitance; Photodiodes; Silicon germanium; SONET; transimpedance amplifier;