Title :
Micro-bump assignment for 3D ICs using order relation
Author :
Kuan, Ta-Yu ; Chang, Yi-Chun ; Chen, Tai-Chen
Author_Institution :
Dept. of Electr. Eng., Nat. Central Univ., Taoyuan, Taiwan
fDate :
Jan. 30 2012-Feb. 2 2012
Abstract :
The routing quality on RDLs in 3D ICs is affected by the micro-bump location seriously. In this paper, we propose a micro-bump assignment method using order relation to minimize the crossing problem and reduce the detours in RDLs. Experimental results show that our approach can obtain an assignment result with 100% routability and minimal wirelength in global routing.
Keywords :
network routing; three-dimensional integrated circuits; 3D IC; global routing; micro-bump assignment method; redistributed layer; Finishing; Lead; Mathematical model; Merging; Routing; Three dimensional displays; Through-silicon vias;
Conference_Titel :
Design Automation Conference (ASP-DAC), 2012 17th Asia and South Pacific
Conference_Location :
Sydney, NSW
Print_ISBN :
978-1-4673-0770-3
DOI :
10.1109/ASPDAC.2012.6164970
