DocumentCode
3499390
Title
A new analog implementation of the Kohonen neural network
Author
Wu, Chung-Yu ; Kuo, Wen-Kai
Author_Institution
Dept. of Electron. Eng., National Chiao-Tung Univ., Hsin-Chu, Taiwan
fYear
1993
fDate
1993
Firstpage
262
Lastpage
266
Abstract
A new circuit implementation of the Kohonen neural networks is proposed. A novel winner-take-all circuit is developed and digital counters are used to store and update the weights. An experimental chip of this system has been fabricated by 1.2 mu m CMOS technology. A architecture is also proposed for these chips to be combined together to form a larger net.
Keywords
CMOS integrated circuits; linear integrated circuits; neural chips; 1.2 micron; CMOS technology; Kohonen neural networks; VLSI; analog implementation; digital counters; winner-take-all circuit; Analog integrated circuits; Artificial neural networks; Biological neural networks; CMOS technology; Counting circuits; Laboratories; Neural networks; Neurons; Organizing; Signal mapping;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems, and Applications, 1993. Proceedings of Technical Papers. 1993 International Symposium on
Conference_Location
Taipei, Taiwan
ISSN
1524-766X
Print_ISBN
0-7803-0978-2
Type
conf
DOI
10.1109/VTSA.1993.263658
Filename
263658
Link To Document