Title :
Predictor-corrector latency insertion method for fast transient analysis of ill-constructed circuits
Author :
Kurobe, Hiroki ; Sekine, Tadatoshi ; Asai, Hideki
Author_Institution :
Dept. of Syst. Eng., Shizuoka Univ., Hamamatsu, Japan
fDate :
Jan. 30 2012-Feb. 2 2012
Abstract :
This paper describes a predictor-corrector latency insertion method (LIM) for a fast transient analysis of an ill-constructed circuit. First, the basic LIM algorithm and limitations of the method are described. Next, we propose the predictor-corrector LIM with a large value of fictitious latency for the ill-constructed topologies. Finally, numerical results show that our proposed method is applicable and efficient for the fast simulation of the ill-constructed circuit.
Keywords :
finite difference time-domain analysis; network analysis; network topology; transient analysis; basic LIM algorithm; ill-constructed circuits; ill-constructed topologies; predictor-corrector latency insertion method; transient analysis; Accuracy; Inductance; Integrated circuit modeling; Power transmission lines; Prediction algorithms; Topology; Transient analysis;
Conference_Titel :
Design Automation Conference (ASP-DAC), 2012 17th Asia and South Pacific
Conference_Location :
Sydney, NSW
Print_ISBN :
978-1-4673-0770-3
DOI :
10.1109/ASPDAC.2012.6164975
