DocumentCode
3499485
Title
Design of CMOS composite transistors with improved operating region
Author
Yu, Young-Gyu ; Choi, Seok-Woo ; Kim, Dong-Yong ; Park, Kyu-Tae ; Ahn, Hong-Jo
Author_Institution
Fac. of Electron. & Inf. Eng., Chonbuk Nat. Univ., Chonju, South Korea
Volume
3
fYear
2000
fDate
2000
Firstpage
1034
Abstract
Proposes two new CMOS composite transistors with an improved operating region by reducing a threshold voltage. The proposed composite transistors 1 and 2 employ a p-type folded composite transistor and an electronic Zener diode in order to decrease the threshold voltage, respectively. The simulation has been carried out using 0.25μm n-well process with 2.5V supply voltage
Keywords
MOSFET; Zener diodes; low-power electronics; 0.25 micron; 2.5 V; CMOS composite transistors; electronic Zener diode; n-well process; operating region; p-type folded transistor; supply voltage; threshold voltage; threshold voltage reduction; Analog circuits; Breakdown voltage; Circuit simulation; Circuits and systems; Diodes; Low voltage; MOS devices; Signal processing; Threshold voltage; Transconductance;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Conference_Location
Lansing, MI
Print_ISBN
0-7803-6475-9
Type
conf
DOI
10.1109/MWSCAS.2000.951393
Filename
951393
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