Title :
A 65ns 1Mb CMOS alternate metal virtual ground EPROM with dual reference sensing scheme and word line voltage regulator
Author :
Hoang, Loc ; Nielsen, P. ; Bergemont, Albert ; Kablanian, Adam ; Irani, Rustom ; Kazerounian, Reza ; Eitan, Boaz ; Salter, Robert, III ; Breinholt, Wallace ; Wolstenholme, Graham ; Anderson, Larry ; Shacham, Etan ; Haggag, Hosam ; Wenzbauer, David ; Dirol
Author_Institution :
Nat. Semiconductor Corp., Santa Clara, CA, USA
Abstract :
The alternate metal virtual ground (AMG) has recently been introduced as a scaling concept for an EPROM array. The AMG cell size in a 0.8 mu m technology (2.56 mu m2) is smaller than the cell size on a conventional architecture implemented in a 0.6 mu m technology (3.6 to 4.4 mu m2). The implementation of the AMG architecture in a 1 Mb (128 K*8) EPROM design with a die size of 14mm2 (3.2mm*4.4mm) using 0.8 mu m single metal CMOS technology is discussed. An access time of 65 ns is accomplished by a decoded precharge and a dual reference sensing scheme. A typical programming time of less than 10 mu s and a Vccmax of greater than 8 V are achieved with the word line voltage regulator (WLVR).
Keywords :
CMOS integrated circuits; EPROM; integrated memory circuits; 0.6 micron; 0.8 micron; 1 Mbit; 65 ns; 8 V; AMG architecture; AMG cell size; CMOS alternate metal virtual ground EPROM; EPROM array; EPROM design; WLVR; access time; dual reference sensing scheme; programming time; scaling concept; single metal CMOS technology; word line voltage regulator; CMOS technology; Clocks; Decoding; EPROM; Lab-on-a-chip; Manufacturing; Pulse amplifiers; Regulators; Voltage; Wafer scale integration;
Conference_Titel :
VLSI Technology, Systems, and Applications, 1993. Proceedings of Technical Papers. 1993 International Symposium on
Conference_Location :
Taipei, Taiwan
Print_ISBN :
0-7803-0978-2
DOI :
10.1109/VTSA.1993.263675