Challenges of future silicon IC technology

The silicon IC technology continues to scale following Moore´s law for over fifty years. Now, we are approaching a critical crossroad as we are about at the limit of conventional optical lithography the enabler of our business. Besides lithography, new materials, device structures, and interconnect schemes must also be developed in order to keep us on the scaling curve. In addition, we not only have to follow the laws of physics but also those of economics: device manufacturing cost can not increase out of proportion from one generation to the next. Concurrently, our industry has begun to pay attention to the vertical dimension. If the progress in shrinking the in-plane dimensions is to slow down, vertical integration can help increasing the areal device density and keep us on the Moore´s law curve, if it is generalized to also include the 3rd dimension. Besides, it gives us integration options hitherto not available with mere 2D integration of devices. Any successful business should be economically profitable, contribute to societal progress, and provide gainful employment. Our business is of no exception. To remain committed to these goals, we have no choice but to continue investment in research and development, promote innovation, and encourage close collaboration of all participants in the semiconductor value chain. Moving forward, our tasks will only become more arduous. Leading-edge semiconductor manufacturers, their customers, and suppliers will have to work more closely and harder than before to be able to share the resulting benefits.