Arc switch modeling with complex-impedance loads

Summary form only given. An arc switch driving a real-impedance load produces an asymmetric voltage waveform with a long dissipative tail as the plasma arc heats and expands. A two-step process is suggested by some measurements. Shunt capacitors have been added to spark switches to hasten arc heating and expansion. Improvements in waveform symmetry and closure properties are possible with more complex networks as well. The design of such networks will require a detailed understanding of switch behavior. Switching performance is analyzed with pSPICE models of the arc switches and the networks. Switch behavior is modeled after the equation (d/R)/sup m/=k /spl int//sub 0//sup t/ I/sup n/ dt, where R is the time-dependent arc switch resistance, I is the arc switch current, d is the arc length, and k is a constant for the particular switch medium. Several switch models are investigated, including those of Braginskii (m=1, n=2/3), Rompe and Weitzel (m=2, n=2), and Vlastos (m=5/3, n=2). Shunt capacitors, shunt stub transmission lines, and more complex networks are employed to improve switching performance. Waveform symmetry, late-time flatness, and rise time can be improved significantly. Modest increases in dV/dt are observed for some models. The relevance of this analysis depends critically upon the accuracy of arc switch models. To improve the accuracy of models, experiments are planned that measures the dynamic impedances of arc switches during closure.