Title :
Implement of a 3D stacked module using edge-interconnect
Author :
Xiongbo Zhao ; Penglong Jiang ; Liangliang Liu
Author_Institution :
Nat. Key Lab. of Sci. & Technol. on Aerosp. Intell. Control, Beijing, China
Abstract :
The ever-increasing circuit density and performance of integrated circuit bring the improvement of design difficulty. Edge-interconnect of SIP technology can reduce the design complexity and system size, improve system reliability and performance. This paper presents a CPU packaging configured with three-dimensionally (3D) integrated SRAM, Flash and some peripheral chips. Signal communication between them is achieved by using edge-interconnect which is implemented by several complex processes, stacking, potting, cutting, gilding and laser engraving etc. Heat dissipation of the packaging is also considered. And the end product has passed functional test and environmental test.
Keywords :
SRAM chips; integrated circuit design; integrated circuit interconnections; integrated circuit packaging; integrated circuit reliability; 3D integrated SRAM; 3D stacked module; CPU packaging; SIP technology; cutting; edge-interconnect; environmental test; ever-increasing circuit density; functional test; gilding; heat dissipation; integrated circuit performance; laser engraving; peripheral chips; potting; signal communication; system reliability improvement; three-dimensionally integrated SRAM; Assembly; Integrated circuit interconnections; Packaging; Random access memory; Reliability; Stacking; Surface treatment;
Conference_Titel :
Electronic Packaging Technology and High Density Packaging (ICEPT-HDP), 2012 13th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4673-1682-8
Electronic_ISBN :
978-1-4673-1680-4
DOI :
10.1109/ICEPT-HDP.2012.6474574
