DocumentCode
3501497
Title
UTBOX and ground plane combined with Al2 O3 inserted in TiN gate for VT modulation in fully-depleted SOI CMOS transistors
Author
Fenouillet-Beranger, C. ; Perreau, P. ; Cassé, M. ; Garros, X. ; Leroux, C. ; Martin, F. ; Gassilloud, R. ; Bajolet, A. ; Tosti, L. ; Barnola, S. ; Andrieu, F. ; Weber, O. ; Beneyton, R. ; Perrot, C. ; de Buttet, C. ; Abbate, F. ; Pernet, B. ; Campidelli,
Author_Institution
CEA-LETI MINATEC, Grenoble, France
fYear
2011
fDate
25-27 April 2011
Firstpage
1
Lastpage
2
Abstract
Thin film devices (FDSOI) are among the most promising candidates for next device generations due to their better immunity to short channel effects (SCE). In addition, the introduction of high-k and metal gate has greatly improved the MOSFETs performance by reducing the electrical oxide thickness (CET) and gate leakage current. However, if midgap metal gate is sufficient to provide a high symmetrical threshold voltage (VT~0.45V) for both NMOS and PMOS devices [1], still one major challenge is to provide VT modulation with an undoped channel in order to satisfy the low power (LP) circuit design requirements [2-5]. To overcome this issue, combining UTBOX substrate with ground plane (GP) has been proposed [2,5]. However this technique with midgap metal gate requires a FBB biasing in order to realize low VT that´s implies a disruptive circuits design to avoid forward diode biasing in the substrate between the two opposite GP type beneath the BOX [6]. In order to introduce more VT modulation flexibilities and especially for LVT PMOS and HVT NMOS, aluminum Oxide (Al2O3) inserted in TiN gate stack has been proposed for bulk devices [7-8] in a gate first process. The viability of this option is studied in this paper for FDSOI, for HfO2 and HfSiON gate oxide, through transistors performance, reliability and variability analysis.
Keywords
CMOS integrated circuits; MOSFET; aluminium compounds; semiconductor device reliability; silicon-on-insulator; thin film devices; titanium compounds; Al2O3; CET; FBB biasing; FDSOI; HVT NMOS; HfO2; HfSiON; LVT PMOS; MOSFET; SCE; TiN; UTBOX substrate; VT modulation; electrical oxide thickness; fully-depleted SOI CMOS transistors; gate leakage current; ground plane; low power circuit design; midgap metal gate; next device generations; short channel effects; thin film devices; voltage 0.45 V; Aluminum oxide; High K dielectric materials; Logic gates; MOS devices; Modulation; Tin;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems and Applications (VLSI-TSA), 2011 International Symposium on
Conference_Location
Hsinchu
ISSN
1524-766X
Print_ISBN
978-1-4244-8493-5
Type
conf
DOI
10.1109/VTSA.2011.5872254
Filename
5872254
Link To Document