Title :
On error correction capability of bit-flipping algorithm for LDPC codes
Author :
Chen, Wen-Yao ; Lu, Chung-Chin
Author_Institution :
Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fDate :
July 31 2011-Aug. 5 2011
Abstract :
The error correction capability of bit-flipping decoding algorithm for low density parity-check (LDPC) codes is studied by introducing variable node adjacency (VNA) graphs which are derived from Tanner graphs of LDPC codes. For codes with column weight λ and girth g = 8, it can be shown that error patterns of weight less than or equal to λ - 1 can be corrected. This result implies that the bit-flipping algorithm could decode up to the random error-correcting capability over binary symmetric channel for girth 8 codes whose random error-correcting capability is equal to λ - 1.
Keywords :
decoding; error correction codes; graph theory; parity check codes; LDPC codes; Tanner graphs; VNA graphs; binary symmetric channel; bit-flipping decoding algorithm; error patterns; girth codes; low density parity check codes; random error correcting capability; variable node adjacency graphs; Educational institutions; Error correction; Error correction codes; Graph theory; Parity check codes; Upper bound; Low density parity-check codes; Tanner graphs; bit-flipping algorithm; variable node adjacency graphs;
Conference_Titel :
Information Theory Proceedings (ISIT), 2011 IEEE International Symposium on
Conference_Location :
St. Petersburg
Print_ISBN :
978-1-4577-0596-0
Electronic_ISBN :
2157-8095
DOI :
10.1109/ISIT.2011.6033743
