DocumentCode :
3503059
Title :
ASIC memory design of 2-D median filters
Author :
Rizkalla, Maher E. ; Palaniswamy, Krishna ; Sinha, Akhouri S C ; El-Sharkawy, Mohamed ; Salama, Paul ; Lyshevski, Sergey ; Gundrum, Harry
Author_Institution :
Dept. of Electr. & Comput. Eng., Purdue Univ., Indianapolis, IN, USA
Volume :
1
fYear :
2000
fDate :
2000
Firstpage :
354
Abstract :
An 8-bit VHDL based 2-D median filter is designed using Mentor Graphic tools. The algorithm is based on sorting pixel samples and extracting their median values. The code was synthesized and optimized for an IC layout using CMOS 2 micron technology. The principal organization of the memory elements to store data that perform two dimensional transpose application is presented. A Matlab program for this algorithm was written, tested, and verified on 400×400 pixel images
Keywords :
CMOS digital integrated circuits; application specific integrated circuits; circuit CAD; circuit layout CAD; high level synthesis; image processing; integrated circuit design; median filters; random-access storage; two-dimensional digital filters; 160000 pixel; 2 micron; 2D median filter design; 400 pixel; 8 bit; ASIC memory design; CMOS technology; IC layout; Matlab program; Mentor Graphic tools; RAM cells; VHDL-based median filter; two dimensional transpose application; Application specific integrated circuits; CMOS integrated circuits; CMOS technology; Data mining; Filters; Graphics; Integrated circuit layout; Integrated circuit synthesis; Sorting; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Conference_Location :
Lansing, MI
Print_ISBN :
0-7803-6475-9
Type :
conf
DOI :
10.1109/MWSCAS.2000.951659
Filename :
951659
Link To Document :
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