Title :
Thermal-aware fault-tolerant system design with coarse-grained reconfigurable array architecture
Author :
Lee, Ganghee ; Choi, Kiyoung
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., Seoul, South Korea
Abstract :
Coarse-grained reconfigurable array architectures have drawn increasing attention due to their performance and flexibility. A typical coarse-grained reconfigurable array architecture has many PEs in the array, which is suitable for implementing spatial redundancy used for fault-tolerant systems design. In this paper, we propose to implement replications and a voting function on the PE array of a coarse-grained reconfigurable array architecture to design a fault-tolerant system. We also introduce thermal-aware application mapping onto the coarse-grained reconfigurable array architecture for reliability. The experiment with Viterbi decoder shows that our approach enables implementing fault-tolerance with 12% area overhead which comes from implementing conditional execution.
Keywords :
Arrays; Redundancy; Reliability engineering; Tunneling magnetoresistance;
Conference_Titel :
Adaptive Hardware and Systems (AHS), 2010 NASA/ESA Conference on
Conference_Location :
Anaheim, CA, USA
Print_ISBN :
978-1-4244-5887-5
Electronic_ISBN :
978-1-4244-5888-2
DOI :
10.1109/AHS.2010.5546249