Title :
0.8 μm BiCMOS process with high resistivity substrate for L-band Si-MMIC applications
Author :
Nakashima, Takayoshi ; Kubo, Satoshi ; Otsu, Y. ; Ike, T. ; Ikeda, Takashi ; Suematsu, Noriharu ; Yamawaki, Minoru ; Hirao, Takami
Author_Institution :
Mitsubishi Electr. Corp., Hyogo
fDate :
29 Sep-1 Oct 1996
Abstract :
This paper describes a BiCMOS process for L-band Si-MMIC applications. Low loss transmission line, high performance bipolar transistor (emitter minimum size ~0.5 μm), 0.8 μm CMOS, and Schottky diode are integrated on a high resistivity silicon substrate (HRS). Losses of two types of transmission lines, which are composed of multilevel metal layers, are investigated in both high and low resistivity substrates. A low noise amplifier (LNA) is fabricated on a conventional low resistivity silicon substrate
Keywords :
BiCMOS integrated circuits; MMIC amplifiers; UHF amplifiers; UHF integrated circuits; elemental semiconductors; mobile radio; silicon; 0.8 micron; BiCMOS process; L-band; MMIC applications; Schottky diode; Si; high resistivity substrate; low loss transmission line; low noise amplifier; multilevel metal layers; BiCMOS integrated circuits; Bipolar transistors; Conductivity; L-band; Low-noise amplifiers; Performance loss; Propagation losses; Schottky diodes; Silicon; Transmission lines;
Conference_Titel :
Bipolar/BiCMOS Circuits and Technology Meeting, 1996., Proceedings of the 1996
Conference_Location :
Minneapolis, MN
Print_ISBN :
0-7803-3516-3
DOI :
10.1109/BIPOL.1996.554627
