DocumentCode :
3504622
Title :
Interrupt Triggered Software Prefetching for Embedded CPU Instruction Cache
Author :
Batcher, Ken W. ; Walker, Robert A.
Author_Institution :
Kent State University, Cisco Systems
fYear :
2006
fDate :
04-07 April 2006
Firstpage :
91
Lastpage :
102
Abstract :
In embedded systems, handling time-critical real-time tasks is a challenge. The software may not only multi-task to improve response time, but also support events and interrupts, forcing the system to balance multiple priorities. Further, pre-emptive task switching hampers efficient interrupt processing, leading to instruction cache misses. This research provides a methodology for using software prefetch instructions in the interrupt handler to improve efficiency, thus making instruction caches more attractive in a real-time environment. The benefits of this technique are illustrated on an ARM processor running application benchmarks with different cache configurations and interrupt arrival patterns.
Keywords :
Application software; Degradation; Embedded software; Embedded system; Hardware; Memory management; Prefetching; Real time systems; Space technology; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Real-Time and Embedded Technology and Applications Symposium, 2006. Proceedings of the 12th IEEE
ISSN :
1545-3421
Print_ISBN :
0-7695-2516-4
Type :
conf
DOI :
10.1109/RTAS.2006.24
Filename :
1613326
Link To Document :
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