DocumentCode :
3505296
Title :
Design, Simulation and Hardware Implementation of a Digital Television System: LDPC channel coding
Author :
Pegoraro, Tarciano F. ; Gomes, Fábio A L ; Lopes, Renato R. ; Gallo, Roberto ; Panaro, José S G ; Paiva, Marcelo C. ; Oliveira, Fabrìcio A. ; Lumertz, Fábio
Author_Institution :
State Univ. of Campinas-UNICAMP, Campinas
fYear :
2006
fDate :
28-31 Aug. 2006
Firstpage :
203
Lastpage :
207
Abstract :
In this paper, we describe a hardware implementation of a low-density parity-check (LDPC) code for the MI-SBTVD project, which aims at the development of an advanced digital television (DTV) system for the SBTVD program. We begin the paper by describing the concept of LDPC codes and the design strategies we have used. We also provide some simulation results that show that the proposed code greatly outperforms codes used by other DTV standards. Finally, we provide details of the hardware implementation of the code
Keywords :
channel coding; digital television; parity check codes; DTV; LDPC channel coding; MI-SBTVD project; digital television system; hardware implementation; low-density parity check code; television standard; Algorithm design and analysis; Channel coding; Code standards; Digital TV; Equations; Hardware; Iterative algorithms; Iterative decoding; Parity check codes; Spread spectrum communication; Digital Television; Implementation of LDPC; LDPC codes; SBTVD;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Spread Spectrum Techniques and Applications, 2006 IEEE Ninth International Symposium on
Conference_Location :
Manaus-Amazon
Print_ISBN :
0-7803-9779-7
Electronic_ISBN :
0-7803-9780-0
Type :
conf
DOI :
10.1109/ISSSTA.2006.311763
Filename :
4100552
Link To Document :
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