Optimization of insulator layer with high breakdown voltage for 10 inch nanowire field emission display

Author

Zhang, G.F. ; Chen, Y.C. ; Li, Y.F. ; Lin, X.Y. ; Lin, L. ; Ke, Y.L. ; Chen, Jun ; Deng, S.Z. ; Xu, N.S.

Author_Institution

State Key Lab. of Optoelectron. Mater. & Technol., Sun Yat-sen Univ., Guangzhou, China

fYear

2012

fDate

9-13 July 2012

Firstpage

1

Lastpage

2

Abstract

In a gate-structured field emission display (FED), the insulator layer is used to keep an electrical insulation between the gate and cathode electrode. The reliability of the insulator layer is an important issue of FED fabrication, especially for large area device. In this study, the insulator layer was prepared using plasma enhanced chemical vapor deposition (PECVD) and the preparation parameters were optimized. Optimal insulator layers consisting of silicon oxide and silicon nitride stacked insulator layers were obtained and applied in a 10-inch ZnO nanowire FED device.

Keywords

II-VI semiconductors; electric breakdown; electrochemical electrodes; field emission displays; insulating materials; nanowires; plasma CVD; reliability; wide band gap semiconductors; zinc compounds; FED fabrication; PECVD; ZnO; cathode electrode; electrical insulation; gate electrode; gate-structured field emission display; high breakdown voltage; insulator layer optimization; insulator layer reliability; nanowire FED device; nanowire field emission display; plasma enhanced chemical vapor deposition; silicon nitride stacked insulator layers; silicon oxide stacked insulator layers; size 10 inch; Cathodes; Insulators; Leakage current; Logic gates; Materials; Zinc oxide; breakwown; field emisison display; plasma enhanced chemical vapor deposition;

fLanguage

English

Publisher

ieee

Conference_Titel

Vacuum Nanoelectronics Conference (IVNC), 2012 25th International

Conference_Location

Jeju

ISSN

pending

Print_ISBN

978-1-4673-1983-6

Electronic_ISBN

pending

Type

conf

DOI

10.1109/IVNC.2012.6316978

Filename

6316978