DocumentCode
3506640
Title
Constrained Flash memory programming
Author
Berman, Amit ; Birk, Yitzhak
Author_Institution
Technion - Israel Inst. of Technol., Haifa, Israel
fYear
2011
fDate
July 31 2011-Aug. 5 2011
Firstpage
2128
Lastpage
2132
Abstract
In NAND Flash memory featuring multi-level cells (MLC), the width of threshold voltage distributions about their nominal values affects the permissible number of levels and thus storage capacity. Unfortunately, inter-cell coupling causes a cell´s charge to affect its neighbors´ sensed threshold voltage, resulting in an apparent broadening of these distributions. We present a novel approach, whereby the data written to Flash is constrained, e.g., by forbidding certain adjacent-cell level combinations, so as to limit the maximum voltage shift and thus narrow the distributions. To this end, we present a new family of constrained codes. Our technique can serve for capacity enhancement (more levels) or for improving endurance, retention and bit error rate (wider guard bands between adjacent levels). It may also be combined with various programming order techniques that mitigate the inter-cell coupling effects and with decoding techniques that compensate for them.
Keywords
decoding; flash memories; programming; NAND flash memory; adjacent-cell level combination; constrained code family; constrained flash memory programming; decoding technique; inter-cell coupling; memory multilevel cell; programming order technique; threshold voltage distribution; Couplings; Decoding; Encoding; Flash memory; Nonvolatile memory; Programming; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Theory Proceedings (ISIT), 2011 IEEE International Symposium on
Conference_Location
St. Petersburg
ISSN
2157-8095
Print_ISBN
978-1-4577-0596-0
Electronic_ISBN
2157-8095
Type
conf
DOI
10.1109/ISIT.2011.6033933
Filename
6033933
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