• DocumentCode
    3506678
  • Title

    Tutorial: 65 NM FPGAs, A Look Under the Hood Technology, Features, and Applications

  • Author

    Alfke, P.

  • Author_Institution
    Xilinx Inc., San Jose
  • fYear
    2006
  • fDate
    28-30 Aug. 2006
  • Firstpage
    1
  • Lastpage
    1
  • Abstract
    Summary form only given. This tutorial describes the why and how of the new 65-nm families of Virtex-5 FPGAs. It describes several aspects of the technology that affect speed, density, and power consumption. The basic device structure and package design have a strong impact on pc-board signal integrity and supply decoupling requirements. Various new or improved features create opportunities for novel applications in digital signal processing, communications, computing and instrumentation.
  • Keywords
    field programmable gate arrays; logic design; 65-nm Virtex-5 FPGA families; device structure; hood technology; package design; pc-board signal integrity; power consumption; size 65 nm; supply decoupling requirements;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications, 2006. FPL '06. International Conference on
  • Conference_Location
    Madrid
  • Print_ISBN
    1-4244-0312-X
  • Type

    conf

  • DOI
    10.1109/FPL.2006.311189
  • Filename
    4100951