Title :
Power Implications of Implementing Logic Using FPGA Embedded Memory Arrays
Author :
Chin, Scott Y L ; Lee, Clarence S P ; Wilton, Steven JE
Author_Institution :
Dept. of Electr. & Comput. Eng., British Columbia Univ.
Abstract :
This paper investigates the power and energy implications of using embedded FPGA memory arrays to implement logic. Previous studies have shown that this technique provides extremely dense implementations of some types of logic circuits, however, these previous studies did not evaluate the impact on power. The authors measure the effects on power and energy as a function of three architectural parameters: the number of available memory arrays, the size of the memory arrays, and the flexibility of the memory arrays. It was shown in this paper that although embedded memories provide area efficient implementations of many circuits, this technique results in additional power consumption. When power can be traded off for density, it was also shown that for most array sizes, the arrays should be as flexible as possible, and that smaller memory arrays are more power efficient than large arrays. When larger arrays are desired for more density improvement, non-square memories with more rows than columns are better. The results were obtained from fully place and routed circuits using modified versions of VPR and the Poon power model. Several results were also verified through measurements on a 0.13mum CMOS FPGA (Altera Stratix EP1S40)
Keywords :
CMOS logic circuits; digital storage; field programmable gate arrays; logic circuits; logic design; network routing; 0.13 micron; Altera Stratix; CMOS; EP1S40; FPGA; Poon power model; VPR; architectural parameters; area efficient implementation; embedded memory arrays; field programmable arrays; logic implementation; nonsquare memory; routed circuits; CMOS logic circuits; Energy measurement; Energy storage; Field programmable gate arrays; Integrated circuit interconnections; Logic arrays; Logic circuits; Memory architecture; Read only memory; Table lookup;
Conference_Titel :
Field Programmable Logic and Applications, 2006. FPL '06. International Conference on
Conference_Location :
Madrid
Print_ISBN :
1-4244-0312-X
DOI :
10.1109/FPL.2006.311200