DocumentCode :
3507088
Title :
A study on circuit simulation using GTO thyristor modeling
Author :
Chung, Yon-Tack ; Seo, Young-Soo ; Sung, Dae-Young ; Lim, Young-Bae ; Kim, Young-chun ; Cho, Moon-Taek ; Kim, Sung-Kyun
Author_Institution :
Myong-Ji Univ., Yongin Kyunggi-do, South Korea
fYear :
1993
fDate :
19-21 April 1993
Firstpage :
557
Lastpage :
562
Abstract :
This study establishes a numerical model of a three junction GTO device. A three-junction configuration provides good visualization of the model´s performance and understanding of the significance of the parameters. Modeling methods are provided using the micromodel method and macromodel method. The problems to be considered for the snubber design such as voltage spike reduction, maximum GTO anode current, and switching power are discussed using the calculation model. As result of the calculations, the snubber circuit stray inductance is found to play an important role in optimizing the minimum switching power loss. Thus, the proposed model GTO device model in this paper solves conventionally difficult problems which cannot have simulation results since convergence cannot be accomplished well in the simulation process and hence cannot treat a simulation completely.<>
Keywords :
network analysis; semiconductor device models; thyristor applications; thyristors; GTO thyristor; anode current; macromodel method; micromodel method; network analysis; parameters; performance; power loss; semiconductor device models; simulation; snubber design; stray inductance; switching power; three junction; voltage spike; Anodes; Circuit simulation; Convergence; Inductance; Numerical models; Snubbers; Switching circuits; Thyristors; Visualization; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Conversion Conference, 1993. Yokohama 1993., Conference Record of the
Conference_Location :
Yokohama, Japan
Print_ISBN :
0-7803-0471-3
Type :
conf
DOI :
10.1109/PCCON.1993.264195
Filename :
264195
Link To Document :
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