DocumentCode
350742
Title
A time-delay digital tanlock loop
Author
Hussain, Zuhir M. ; Boashash, Boualem ; Al-Araji, Saleh R.
Author_Institution
Signal Process. Res. Centre, Queensland Univ. of Technol., Brisbane, Qld., Australia
Volume
1
fYear
1999
fDate
1999
Firstpage
391
Abstract
A digital tanlock loop (DTL) that utilises a constant time-delay unit instead of the constant 90° phase-shifter is proposed to reduce the complexity of implementation and rid the circuit of the practical problems, approximations and limitations caused by the 90° phase-shifter. The time-delay digital tanlock loop (TDTL) preserves the most important features of the conventional DTL (CDTL) and introduces improvement over the first-order CDTL under suitable choice of the circuit parameters
Keywords
delay lock loops; digital phase locked loops; network parameters; TDTL; approximations; circuit parameters; constant time-delay unit; conventional DTL; digital phase locked loops; digital tanlock loop; first-order CDTL; implementation complexity reduction; time-delay digital tanlock loop; Australia; Circuit noise; Clocks; Delay; Digital signal processing; Frequency; Microprocessors; Phase locked loops; Sampling methods; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing and Its Applications, 1999. ISSPA '99. Proceedings of the Fifth International Symposium on
Conference_Location
Brisbane, Qld.
Print_ISBN
1-86435-451-8
Type
conf
DOI
10.1109/ISSPA.1999.818194
Filename
818194
Link To Document