• DocumentCode
    3507548
  • Title

    Reliability of HTS and HH/HT tests performed in chips and flex substrates assembled by a thermosonic flip-chip bonding process

  • Author

    Cheng-Li Chuang ; Jong-Ning Aoh ; Min-Yi Kang

  • Author_Institution
    Dept. of Occupational Safety & Health, Chung Shan Med. Univ., Taichung, Taiwan
  • fYear
    2012
  • fDate
    13-16 Aug. 2012
  • Firstpage
    1360
  • Lastpage
    1366
  • Abstract
    This study assesses the reliability of the high-temperature storage (HTS) test and high humidity/high temperature (HH/HT) test for an assembly of chips thermosonically bonded onto flex substrates. Environmental parameters used in the HTS and HH/HT tests were consistent with joint electron device engineering council (JEDEC) specifications. The die-shear test was applied to examine changes in die-shear forces for specimens subjected to HTS and HH/HT test. The microstructure of test specimens was analyzed to evaluate reliability and to identify possible failure mechanisms. Die-shear force decreased slightly as HTS test duration increased. When the duration of the HTS test was increased, the percentage of gold bumps that peeled off of the surface of copper pads on the chip side increased, and crack existed at the bonding interface between gold bumps and bond pads of silicon chips. This crack was formed due to thermal stress generated during the HTS test, and degraded the die-shear force of the assembly of chips and flex substrates. Cracks and blisters that occurred at the bonding interface between gold bumps and bond pads of silicon chips after HH/HT tests of varying durations deteriorated the die-shear forces. Blisters that formed on the bond pad surfaces resulted from moisture penetrating the deposited layers of bond pads before being vaporized. The reliability of HTS and HH/HT test must be improved to prevent crack forming at the bonding interface between the gold bumps and bond pads and to prevent moisture from penetrating the deposited layers of bond pads.
  • Keywords
    assembling; bonding processes; cracks; elemental semiconductors; failure analysis; flip-chip devices; reliability; silicon; HH-HT test reliability; HTS test reliability; JEDEC specifications; blisters; bond pad deposited layers; bonding interface; chip substrates; copper pad surface; cracks; die-shear force; failure mechanisms; flex substrates; high humidity-high temperature test reliability; high-temperature storage test reliability; joint electron device engineering council specifications; silicon chip bond pads; silicon chip gold bumps; test specimen microstructure; thermosonic flip-chip bonding process; Bonding; Copper; Electrodes; Gold; Reliability; Surface cracks; Surface treatment; HH/HT test; HTS test; Thermosonic flip-chip bonding process; flex substrate;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Packaging Technology and High Density Packaging (ICEPT-HDP), 2012 13th International Conference on
  • Conference_Location
    Guilin
  • Print_ISBN
    978-1-4673-1682-8
  • Electronic_ISBN
    978-1-4673-1680-4
  • Type

    conf

  • DOI
    10.1109/ICEPT-HDP.2012.6474859
  • Filename
    6474859