Title :
Ray Tracing Hardware System Using Plane-Sphere Intersections
Author :
Kaeriyama, Yoshiyuki ; Zaitsu, Daichi ; Komatsu, Kazuhiko ; Suzuki, Kenichi ; Nakamura, Tadao ; Ohba, Nobuyuki
Author_Institution :
Graduate Sch. of Inf. Sci., Tohoku Univ., Sendai
Abstract :
Ray tracing is a global illumination based rendering method widely used in computer graphics. Although it generates photo-realistic images, it requires a large number of computations. In ray tracing, the ray-object intersection test is one of the dominant factors for the processing speed. To accelerate the intersection test, we propose a new method based on a plane-sphere intersection algorithm, and show a hardware system using an FPGA. The computations used in the method are highly pipelined and parallelized by optimizing the balance between the computation speed and the memory data bandwidth. As a result, the prototype makes full use of 512 DSP cores built in Xilinx Vertex-4 SX FPGA, and the average utilization of the DSP cores is close to 90%. The simulation results show that the proposed system running at 160MHz performs the intersection test a few hundred times faster than a commodity PC with a 3.4GHz Pentium 4
Keywords :
digital signal processing chips; field programmable gate arrays; ray tracing; rendering (computer graphics); 160 MHz; 3.4 GHz; DSP cores; FPGA; global illumination based rendering method; photorealistic images; plane-sphere intersection algorithm; ray tracing hardware system; ray-object intersection test; Computer graphics; Concurrent computing; Digital signal processing; Field programmable gate arrays; Hardware; Image generation; Lighting; Ray tracing; Rendering (computer graphics); System testing;
Conference_Titel :
Field Programmable Logic and Applications, 2006. FPL '06. International Conference on
Conference_Location :
Madrid
Print_ISBN :
1-4244-0312-X
DOI :
10.1109/FPL.2006.311231