• DocumentCode
    3507577
  • Title

    Efficient Automated Synthesis, Programing, and Implementation of Multi-Processor Platforms on FPGA Chips

  • Author

    Nikolov, Hristo ; Stefanov, Todor ; Deprettere, Ed

  • Author_Institution
    LIACS, Leiden University, The Netherlands, email: nikolov@liacs.nl
  • fYear
    2006
  • fDate
    Aug. 2006
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Emerging embedded System-on-Chip (SoC) platforms are increasingly becoming multiprocessor architectures. The advances in the FPGA chip technology make the implementation of such architectures in a single chip feasible and very appealing. Although the FPGA chip technology is well developed by companies such as Xilinx and Altera, the concepts and the necessary tool support for building multiprocessor systems on a single FPGA chip are still not mature enough. As a consequence, system designers experience significant difficulties in 1) designing multiprocessor systems on FPGAs in a short amount of time and 2) programming such systems in order to satisfy the performance needs of applications executed on them. In this paper we present our concept for multiprocessor system design, programing, and implementation that addresses and solves the above two problems in a particular way. We have implemented the concept in a tool called ESPAM which is briefly introduced as well. Also, we present some results obtained by applying our concept and ESPAM tool to automatically generate multiprocessor systems that execute a real-life application, namely a Motion-JPEG encoder.
  • Keywords
    Application software; Buildings; Embedded system; Field programmable gate arrays; Hardware; Libraries; Multiprocessing systems; Process design; System-on-a-chip; Unsolicited electronic mail;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications, 2006. FPL '06. International Conference on
  • Conference_Location
    Madrid
  • Print_ISBN
    1-4244-0312-X
  • Type

    conf

  • DOI
    10.1109/FPL.2006.311232
  • Filename
    4100994