DocumentCode :
3507663
Title :
High-Performance and Parameterized Matrix Factorization on FPGAs
Author :
Zhuo, Ling ; Prasanna, Viktor K.
Author_Institution :
Department of Electrical Engineering, University of Southern California, Los Angeles, USA, lzhuo@usc.edu
fYear :
2006
fDate :
Aug. 2006
Firstpage :
1
Lastpage :
6
Abstract :
FPGAs have become an attractive choice for scientific computing. In this paper, we propose a high performance design for LU decomposition, a key kernel in many scientific and engineering applications. Our design achieves the optimal performance for LU decomposition using the available hardware resources. The design is parameterized. Thus, it can be easily adapted to various hardware constraints. Experimental results show that our design achieves high performance and offers good scalability. Our implementation on a Xilinx Virtex-II Pro XC2VP100 achieves superior sustained floating-point performance over existing FPGA-based implementations and optimized libraries on the state-of-the-art processors.
Keywords :
Application software; Computer applications; Delay; Field programmable gate arrays; Hardware; Kernel; Libraries; Linear algebra; Matrix decomposition; Scientific computing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications, 2006. FPL '06. International Conference on
Conference_Location :
Madrid
Print_ISBN :
1-4244-0312-X
Type :
conf
DOI :
10.1109/FPL.2006.311238
Filename :
4101000
Link To Document :
بازگشت