DocumentCode :
3507850
Title :
A framework for scheduler synthesis
Author :
Altisen, K. ; Gossler, G. ; Pnueli, A. ; Sifakis, J. ; Tripakis, S. ; Yovine, S.
Author_Institution :
Verimag, Gieres, France
fYear :
1999
fDate :
1999
Firstpage :
154
Lastpage :
163
Abstract :
We present a framework integrating specification and scheduler generation for real time systems. In a first step, the system, which can include arbitrarily designed tasks (cyclic or sporadic, with or without precedence constraints, any number of resources and CPUs) is specified as a timed Petri net. In a second step, our tool generates the most general non preemptive online scheduler for the specification, using a controller synthesis technique
Keywords :
Petri nets; formal specification; real-time systems; scheduling; arbitrarily designed tasks; controller synthesis technique; general non preemptive online scheduler; precedence constraints; real time systems; scheduler generation; scheduler synthesis framework; timed Petri net; Application software; Automata; Buildings; Computer science; Delay; Equations; Processor scheduling; Real time systems; Resource management; Synchronization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Real-Time Systems Symposium, 1999. Proceedings. The 20th IEEE
Conference_Location :
Phoenix, AZ
ISSN :
1052-8725
Print_ISBN :
0-7695-0475-2
Type :
conf
DOI :
10.1109/REAL.1999.818838
Filename :
818838
Link To Document :
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