Title :
Configuration Scheduling for Conditional Branch Execution Onto Multi-Context Reconfigurable Architectures
Author :
Rivera, F. ; Sánchez-Élez, M. ; Fernández, M. ; Hermida, R. ; Bagherzadeh, N.
Author_Institution :
Univ. Complutense de Madrid, Madrid
Abstract :
This paper addresses the exploitation of the capabilities of multi-context reconfigurable architectures to handle a variety of interactive multimedia services. One of the main features of these applications is their changing behavior depending on the runtime scenario, turning the configuration management into a key point. In this work, a configuration scheduler for these applications is proposed. We describe the target applications at a task (kernel) granularity by using data flow graphs in which some kernels are conditionally executed depending on runtime conditions. After testing a condition that decides the next kernel to be executed, its corresponding configurations and input data should be loaded into the on-chip memory before its execution starts, producing a computation stall. Our configuration scheduler minimizes these computation stalls and reduces the application´s latency by loading configurations before they are needed. Experimental results obtained for interactive and synthetic applications meet their real-time constraints.
Keywords :
configuration management; data flow graphs; microprocessor chips; reconfigurable architectures; task analysis; conditional branch execution; configuration management; configuration scheduling; data flow graphs; interactive multimedia services; multi-context reconfigurable architectures; on-chip memory; task granularity; Application specific integrated circuits; Delay; Field programmable gate arrays; Kernel; Processor scheduling; Programmable logic arrays; Radio control; Reconfigurable architectures; Runtime; Switches;
Conference_Titel :
Field Programmable Logic and Applications, 2006. FPL '06. International Conference on
Conference_Location :
Madrid
Print_ISBN :
1-4244-0312-X
DOI :
10.1109/FPL.2006.311271