Voxelization chip design using FPGAs

In this paper, a set of projective algorithms for computationally fast and efficient functions for volume rendering are explored for hardware implementation. Three voxelization algorithms are used to model three-dimensional objects of a line, a triangle and a tetrahedron respectively. These codes are later compiled, simulated and downloaded (in bit streams) to the FPGA chip on the Altera hardware card. The overall architecture is shown. The main focus of this paper will be the implementation and analysis efforts in designing the FPGA based solution for voxelization