A modified two-step SOVA-based turbo decoder for low power and high performance

In this paper two methods for low power and high performance are proposed for the soft output Viterbi algorithm (SOVA). One is to employ a modified architecture using a combination of a trace back (TB) for finding survivor states and a double trace back for finding the weight in two-step SOVA. The other is to lower the reliability values to the same level as a scaling factor to compensate for the distortion brought by overestimating those values in the original SOVA. We introduce a fixed scaling factor 0.25 or 0.33 for a rate 1/3 and 8-state turbo decoder with a 256-bit frame in hardware implementation to lower the reliability values. The modified architecture used in two-step SOYA allows important savings in area and power dissipation, compared with those of one-step (register exchange (RE) or TB) SOVA, and it also provides higher SNR performance (2 dB at the BER IE-04) than that of the conventional SOVA. Good performance is obtained by using a fixed scaling factor by which the soft output of SOVA can be considered as being multiplied. The simulation results show that the modified architecture with both methods contributes to low power and high performance