Title :
Prototyping a Globally Asynchronous Locally Synchronous Network-On-Chip on a Conventional FPGA Device Using Synchronous Design Tools
Author :
Wang, Xin ; Ahonen, Tapani ; Nurmi, Jari
Author_Institution :
Inst. of Digital & Comput. Syst., Tampere Univ.
Abstract :
An FPGA prototype of a four-node globally-asynchronous locally-synchronous network-on-chip is described. The network for global communication operates asynchronously at the link level and synchronously within a node. Two C-element control pipelines constitute the control logic for the asynchronous part. C-element and asynchronous arbiter realizations on FPGA using standard synchronous design tools are presented
Keywords :
asynchronous circuits; field programmable gate arrays; logic design; network-on-chip; prototypes; FPGA device; control logic; global communication; globally asynchronous locally synchronous network-on-chip; synchronous design tools; two C-element control pipelines; Application specific integrated circuits; Asynchronous circuits; Clocks; Communication system control; Computer networks; Field programmable gate arrays; Global communication; Network-on-a-chip; Prototypes; System-on-a-chip;
Conference_Titel :
Field Programmable Logic and Applications, 2006. FPL '06. International Conference on
Conference_Location :
Madrid
Print_ISBN :
1-4244-0312-X
DOI :
10.1109/FPL.2006.311284
